Resettable sigma-delta analog-to-digital (A/D) converters, sometimes called incremental analog-to-digital converters, are known. A/D converters of this type are typically used for low frequency measurements, such as DC measurements or sensor applications. A converter of this design typically samples the input signal for a particular number of samples to generate a digital output having predetermined number of bits. The ratio of the number of analog samples to the number of bits in the digital output is known as the oversampling ratio. The achievable resolution for such a converter is a function of the oversampling ratio, but it is not solely dependent upon this ratio. Generally, a lower oversampling ratio provides a shorter conversion time, which is an important parameter for most low power applications.
An example of a resettable sigma-delta A/D converter is shown in FIG. 7. This converter configuration is called a first order, resettable sigma-delta A/D converter 700. An A/D converter 708 and a digital-to-analog (D/A) converter 710 divide the converter configuration into two domains. The area to the left of the converters is an analog domain and the area to the right of the converters is a digital domain. These two converters have a lower resolution than the output 714 of the circuit 700, and, may have even have a resolution of only a single bit. The output of the A/D converter 708 is fed back by the D/A converter 710 to the summing node 718 to provide a feedback function. The order level of the converter circuit 700 refers to the total number of integrators on the analog side of the converter. For the converter shown in FIG. 7, a single integrator 704 is provided. For a single integrator, 2N samples are required to resolve N bits. The reset signal re-initializes the integrators in both domains.
In the operation of the circuit 700, the analog signal is sampled and provided to the integrator 720. The output of the integrator 720 is converted into a digital value by the converter 708. This converter quantizes the sample. The output of the converter 708 is provided to a digital integrator 724, which operates as a decimation filter to generate the output for the converter 700. The output of the converter 708 is also converted by to an analog signal by the converter 710. The analog signal is added to the input signal at the summing node 718. The integration on this composite signal by the integrator 720 moves the noise in the output of the converter 708 into the high frequency components of the integrator's output. After conversion of the integrator's output by the converter 708, the decimation filter operates as a low pass filter, which removes the high frequency components, including the noise. An appropriate settling time enables the output 714 to stabilize to a digital value for the sampled analog signal. The reset signal enables the active components in the circuit to be turned off to conserve electrical energy.
The sigma-delta A/D converter design of FIG. 7 can be enhanced by including a second integrator in the single loop. Such a converter is shown in FIG. 8. In this circuit 800, a pair of integrators 804 and 808 is provided in the analog domain and a pair of digital integrators 812 and 816 is provided in the digital domain. Again, an A/D converter 820 and a D/A converter 824 are provided to quantize the integrated analog sampled signal and provide analog feedback to both integrators through the summing nodes 828 and 830. The operation of this circuit is similar to that discussed above with reference to FIG. 7; however, the addition of an analog integrator enables the analog signal to be resolved for N bits with 2N/2 samples. Additional integrators may be added to the analog and digital sides to reduce the number of samples needed for an N bit resolution. Unfortunately, as the number of sample integrations increases, the signal also increases and the signal levels eventually exceed an acceptable level. In particular, the feedback configuration may cause overload and require complicated circuitry to implement a desired noise transfer function.